Customers adopting Design Compiler NXT report significant reduction in runtimes together with improvements in power, performance and area (PPA) New advanced optimizations, such as concurrent clock and ...

SNPS expands its TSMC partnership, advancing AI, SoC, and multi-die design with certified flows, IP, and 3DIC innovations.

Oticon has widely deployed Design Compiler Graphical for implementation of its hearing solutions ICs Multi-corner multi-mode (MCMM) synthesis results in lower leakage and faster convergence Congestion ...

Design Compiler NXT incorporates innovative and efficient optimization engines delivering 2X faster runtime and cloud-ready distributed synthesis that boosts runtime further Advanced-node support, ...

Synopsys and TSMC have partnered to accelerate the development of next-generation AI chips and multi-die designs.

Synopsys Design Compiler NXT incorporates innovative and efficient optimization engines delivering faster runtime and improved power and timing QoR Advanced-node support, including common libraries ...

PARIS — EDA and IP vendor Synopsys Inc. (Mountain View, Calif.) said it has extended its topographical technology in Design Compiler 2010 to produce physical guidance to its place-and-route solution, ...

Synopsys' Design Compiler 2010 accounts for the challenges of modern physical IC design, offering floor plan exploration from within the synthesis environment. It also delivers physical guidance to IC ...

AMD deploys Synopsys' Fusion Compiler RTL-to-GDSII product for the development of its next-generation processor products Unique, single-data-model architecture and unified, full-flow optimization ...