Semiconductor Engineering

TCAD Simulation Challenges For Gate-All-Around Transistors

The transition from finFET technology to Gate-All-Around (GAA) technology helps to reduce transistor variability and resume channel length scaling. It also brings several new challenges in terms of ...
EDN

Power dissipation in portables: Design considerations using low-power CMOS ICs

When a CMOS circuit is in an idle state there is still some static power dissipation–a result of leakage current through nominally off transistors. Both nMOS and pMOS transistors used in CMOS logic ...
Semiconductor Engineering

Mobility Gets A Boost With Expanded Epi Applications

Even as industry moves into the era of the high k metal gate (HKMG) and FinFET transistor, chipmakers continue to seek ways to improve device performance. One of the latest advances and the subject of ...
Electronic Design

Use Hybrid PMOS-NMOS Active Loads To Cut Substrate Noise In Differential Amplifiers

PMOS transistors are less vulnerable to substrate noise since they’re placed in separate wells; designers implement guard rings to attenuate the substrate noise propagation. However, substrate noise ...
CRN

IBM-AMD, Intel Describe 65-nm Transistors

Intel is in production with several 65-nm processors now, creating an inventory of commercial microprocessor products that will begin shipping early next year. At the IEDM conference, Intel showed die ...
PC Magazine

CMOS transistor

The most widely used integrated circuit (IC) technology. Although the term CMOS "transistor" is widely used, it is somewhat misleading because in order to reduce power consumption, CMOS is actually ...